Implementation of boolean function in multiplexer | Solved Problems
A multiplexer is a digital circuit, which is used to select a single input from the multiple input lines. There are several problems on multiplexer, which are solved to get the desired circuit.
In this section, you will learn, How to implement a boolean expression in a multiplexer?
First, do you know, “What is a multiplexer?” Before getting into the problem on implementation, be clear with the multiplexer.
Type #1
Let us solve some problems on implementing the boolean expressions using a multiplexer. In this method, 3 variables are given(say P, Q, R), which are the selection inputs for the mux. For three selection inputs, the mux to be built was 2n = 23 = 8 : 1. So, in this method, the type of mux can be decided by the given number of variables.
How to solve?
- The first step is to select the multiplexer. If the given expression has n variables, then determine the multiplexer using the formula 2n : 1.
- Connect the inputs, that correspond to the given minterms to logic 1.
- Connect all the other inputs to the ground(logic 0).
- Connect the input variables(P, Q, R) as the selection lines.
Solved problem #1
Implement the boolean expression F(A, B, C) = ∑ m(2, 3, 6, 7) using a multiplexer.
Solution:
There are 3 variables in the given expression, hence 2n = 23 = 8 : 1 multiplexer. So, the mux has 8 input lines, 3 selection lines, and one output.
The inputs, corresponding to the minterms (2, 3, 6, 7) are connected to logic 1 and the remaining terms to logic 0(grounded). The given input variables are connected as three selection lines.
Solved problem #2
Implement the boolean expression F(A, B, C) = ∑ m(0, 1, 3, 5, 7) using a multiplexer.
Solution:
Similar to the above problem, there are 3 variables and hence 8 : 1 multiplier is used to solve the expression. The three input variables(A, B, C) are connected as three selection lines.
The inputs, corresponding to the minterms (0, 1, 3, 5, 7) are connected to logic 1 and the remaining terms to the logic 0(grounded).
Type #2
If the boolean expression has n+1 variables, we take only n variables as the selection line of the multiplexer. The remaining single variable is used as the inputs of the mux. In this way, any boolean expression having n variables can be implemented with 2n-1 to 1 multiplexer.
How to solve this method?
- From the given set of n+1 input variables, the n least significant variables are used as selection line inputs.
- The 2n inputs for 2n : 1 multiplexer are derived by using an implementation table.
- The implementation table has all the inputs(D0, D1, D2, D3,…) for the multiplexer, under which, all the minterms are listed in two rows.
- The first row consists of all minters where A is complemented and the second row has the remaining minterms where A is in uncomplemented form.
- The minterms in the given boolean expression alone are circled.
Look at the example of implementation table here,
Each column is analyzed separately as follows:
- If both the minterms in the two rows are circled, 1 is applied to the corresponding multiplexer input.(check 4th column in the above table)
- If both the minterms in the two rows are not circled, 0 is applied to the corresponding multiplexer input.(check 3rd column in the above table)
- If the minterm in the first row alone is circled,
is applied to the corresponding multiplexer input.(check 2nd column in the above table) - If the minterm in the second row alone is circled,
is applied to the corresponding multiplexer input.(check 1st column in the above table)
Solved problem #3
Implement the boolean expression F(A, B, C) = ∑ m(0, 2, 5, 6) using 4 : 1 multiplexer.
Solution:
In the given boolean expression, there are 3 variables. We should use 23 : 1 = 8 : 1 multiplexer. But as per the question, it is to be implemented with 4 : 1 mux.
For 4 : 1 multiplexer, there should be 2 selection lines. So from the given 3 variables, the 2 least significant variables(B, C) are used as selection line inputs.
Let us derive the four inputs of 4 : 1 multiplexer using the implementation table. The four inputs are listed in column-wise and all the minterms are written under the four inputs in 2 rows as shown below.
The minterms given in the boolean expression is circled and analyzed. After analyzing, the input values of 4 : 1 mux is obtained as , A, 1, 0.
Thus the circuit can be drawn as below.
Solved problem #4
Implement F(A, B, C, D) = ∑ m(0, 1, 5, 6, 8, 10, 12, 15) using 8 : 1 multiplexer.
Solution:
In the given boolean expression, there are 4 variables. We should use 24 : 1 = 16 : 1 multiplexer. But as per the question, it is to be implemented with 8 : 1 mux.
For 8 : 1 multiplexer, there should be 3 selection lines. So from the given 4 variables, the 3 least significant variables(B, C, D) are used as selection line inputs.
The 8 inputs are derived using the implementation table shown below
From the derived input, 8 : 1 multiplexer can be drawn as below
Type #3
In the above two types, a multiplexer circuit is derived from the given boolean expression. In type #3, a logic function is derived from the given multiplexer circuit. Based on the given circuit, form the truth table, from which the logical expression can be derived.
Solved problem #5
For the given multiplexer circuit, determine the logic function.
Solution:
In the given multiplexer circuit, B and C are the selection inputs. Hence the possible input combinations are 00, 01, 10 and 11.
For these input combinations, the mux selects a particular input and gives it to the output.
That is, if BC input is 00, D0 is selected as the output. Similarly if BC = 01, D1 is selected as the output. When the input BC = 10, D2 is selected as the output. If BC = 11, D3 is selected as the output.
The truth table is given below.
From the truth table, the output expression can be written as,
Its corresponding minterm expression can be written as, F = Σ m(4, 5, 3)
The obtained expression can be still minimized as below,
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